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60-GHz receiver and transmitter front-ends in 65-nm CMOS

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4 Author(s)
Karkkainen, M. ; SMARAD-2, TKK / Helsinki Univ. of Technol., Espoo, Finland ; Varonen, M. ; Sandstrom, D. ; Halonen, K.A.I.

In this paper, 60-GHz receiver and transmitter front-ends implemented in 65-nm baseline CMOS are presented. Both down- and upconversion mixers employ a spiral transmission line balun for the local oscillator input, thus, creating a balanced mixer topology. The receiver has a balanced active mixer and a low noise amplifier on the same chip. The measured results show that the receiver has a 14.5-dB gain and a 9.2-dB double sideband noise figure with 53-GHz local oscillator and 1.5-GHz intermediate frequencies. The transmitter front-end consists of a balanced resistive mixer and a five-stage medium power amplifier. The mixer topology enables wideband LO-suppression as well as IF and RF responses. The measured upconversion gain and 1-dB output compression point at 60 GHz are 12 dB and -3 dBm, respectively. The saturated output power is +2 dBm. The chip sizes are 0.90 and 1.00 mm2 for the receiver and transmitter front-end, respectively.

Published in:

Microwave Symposium Digest, 2009. MTT '09. IEEE MTT-S International

Date of Conference:

7-12 June 2009