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A 71–76 GHz chip set for wireless communication in 65-nm CMOS technology

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7 Author(s)
Jhe-Jia Kuo ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Wei-Heng Lin ; Che-Chun Kuo ; Tseng, J.R.
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This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a conversion loss of better than -5 dB from 53 to 73 GHz at 4 dBm LO power. The up-conversion mixer has a conversion loss better than -5 dB from 53 to 75 GHz at 6 dBm LO power. The medium power amplifier delivers 5 dBm P1dB and 6.7 dBm Psat at 71 GHz. These results show the potential of the 65-nm CMOS technology in high frequency circuit design.

Published in:

Microwave Symposium Digest, 2009. MTT '09. IEEE MTT-S International

Date of Conference:

7-12 June 2009

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