Design and Implementation of a Scalable Channel Emulator for Wideband MIMO Systems

Wireless channel emulation is becoming increasingly important, particularly with the advent of multiple-input-multiple-output (MIMO) systems, where system performance is highly dependent on the accurate representation of the channel condition. In this paper, we compare the conventional finite impulse response (FIR)-based emulator versus solely performing the emulation in the frequency domain. We show that for single-input-single-output (SISO) systems, FIR-based emulators are computationally efficient but that the complexity rapidly becomes impractical for larger array sizes. On the other hand, frequency-domain approaches exhibit a fixed initial complexity cost that grows at a reduced rate as a function of the array size, resulting in significant savings in complexity for higher order arrays. As an illustrative example of this approach, field-programmable gate array (FPGA) architecture implementing a sample 3 times 3 MIMO system exhibits resource savings of up to 67% over a similarly constrained FIR approach. The architecture is discussed in detail, and implementation results, as well as laboratory measurements, are presented.