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Optimization of the channel lateral strain profile for improved performance of multi-gate MOSFETs

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10 Author(s)
De Michielis, L. ; Nanoelectronic Devices Lab. (Nanolab), Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland ; Moselund, K.E. ; Bouvet, D. ; Dobrosz, P.
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We report for the first time the optimization of the channel lateral strain profile as a new technological booster for improved performance of multi-gate n-channel MOSFET. We find that quasi-uniform or flat-Gaussian-close-to-the-drain profiles are optimum for the Ion boosting of sub-50 nm scaled MOSFETs, while the penalty on Ioff and subthreshold slope is minimum. The reported predictions use realistic lateral uniaxial strain profiles, with peaks up to few GPa's and average values of hundreds of MPa's.

Published in:

VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on

Date of Conference:

27-29 April 2009