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Impacts of NBTI on SRAM array with power gating structure

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3 Author(s)
Yang, Hao-I ; Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan ; Ching-Te Chuang ; Wei Hwang

We have analyzed impacts of NBTI on power-gated SRAM arrays in terms of RSNM, WM, power, performance, and wake-up time. We also studied PMOS-type pre-charge circuit degradation, and compared two basic sensing amplifier structures when they were under NBTI stress. Our results indicated that VT drift of power switch degraded RSNM but improved WM in power-gated SRAM. Signal probability of unselected cells also impacted SRAM RSNM and WM. The leakage currents and virtual supply bounce were reduced, but wake-up time became longer. Longer precharge phase and judicious choice of sense amplifier structure would improve the tolerance to NBTI effects.

Published in:

VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on

Date of Conference:

27-29 April 2009