By Topic

Additive mobility enhancement and off-state current reduction in SiGe channel pMOSFETs with optimized Si Cap and high-k metal gate stacks

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

10 Author(s)
Jungwoo Oh ; SEMATECH, Austin, TX, USA ; Majhi, P. ; Jammy, R. ; Joe, R.
more authors

We have demonstrated high mobility pMOSFETs on high quality epitaxial SiGe films selectively grown on Si (100) substrates. With a Si cap processed on SiGe channels, HfSiO2 high-k gate dielectrics exhibited low C-V hysteresis (<10 mV), interface trap density (7.5times1010), and gate leakage current (~10-2 A/cm2 at an EOT of 13.4 Aring), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the SiGe channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ~100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of SiGe channels, which are major causes of the high off-state current of small bandgap energy SiGe pMOSFETs, by improving gate control over the channel.

Published in:

VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on

Date of Conference:

27-29 April 2009