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A Flexible High Throughput FPGA Based Prototype Platform for RW Channel Development

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6 Author(s)
Jakka, B. ; STMicroelectronics Inc., San Diego, CA, USA ; Dash, D. ; Yalcin, C. ; Ly Dang
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It is difficult to model all effects of magnetic channel for performance simulations. Verifying in a real environment becomes especially critical when algorithms rely on special properties of the Read/Write Channel (RWC) for magnetic recording systems. A self contained flexible FPGA based prototype platform has been developed for RWC digital architecture and performance evaluation for Hard Disk Drive (HDD) applications. The developed platform consists of all required hardware and software components like HDD for storing and retrieving information, ASIC Channel front-end (CFE) for samples equalization and optimization, Channel Back-End (CBE) using FPGAs for algorithm and architectural exploration and software tools to control and measure the performance. It achieves the throughput of 3.4 Billion sectors per day which is about 4000 times faster than the computer simulations with Matlab/C models on a high performance computer. This allows running RWC system operation with actual HDD. The overall FPGA based platform provides an extremely powerful development tool of RWC for HDD application.

Published in:

Rapid System Prototyping, 2009. RSP '09. IEEE/IFIP International Symposium on

Date of Conference:

23-26 June 2009