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On a low power distributed arithmetic design with GA-based optimization approach

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5 Author(s)
Hun-Chen Chen ; Dept. of Electron. Eng., Nat. United Univ., Miaoli, Taiwan ; Jui-Cheng Yen ; Kuo-Tai Fan ; Chih-Yung Lin
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In this paper, based on genetic algorithm (GA) an optimization approach is proposed to the arrangement of memory content in group distributed arithmetic (GDA) architecture with low power consumption. According to the information of data such as a kind of image sequence, we take one in the sequence to find an arrangement of memory content to have the near optimal transition activity on the data bus of memory in GDA design. With more than two generations of calculation by genetic algorithm, the arrangement of memory content facilitates low power consumption for the GDA design. The simulation result shows the hamming distance on the memory output of GDA design is reduced around 15.6%. And the power consumption can be reduced more than 6.4% on the verification of GDA hardware.

Published in:

Consumer Electronics, 2009. ISCE '09. IEEE 13th International Symposium on

Date of Conference:

25-28 May 2009