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Poly-width-modification method for canceling layout-dependent characteristic variations for low-standby-power CMOS technologies

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9 Author(s)
Nakai, S. ; Device Manuf. Unit, Fujitsu Microelectron. Ltd., Kuwana, Japan ; Fujita, K. ; Minami, T. ; Mitani, J.
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Due to increase of integration density on a chip, layout variations have a serious impact on MOSFET behavior, such as active-area-size dependence (the STI-stress effect), well-boundary location dependence (the well-proximity effect) and other proximity effects. A circuit MOSFET model (An extracted SPICE-parameter set) tends to have complex expressions. Circuit designers, however, require a sufficiently tuned SPICE-parameter set even at the early stage of technology development. In particular, accuracy of MOSFET-off-current estimation is essential to low-standby-power products like cellular phones. We propose a practical method of MOSFET-characteristic correction for the difference between the final silicon characteristics and the early extracted SPICE-parameter set. This is a simple and reasonable method which is to perform the final modification of gate-poly width taking into account layout-proximity dependence. This method enables real concurrent development by solving a problem of the inconsistency of silicon and SPICE parameters.

Published in:

Advanced Semiconductor Manufacturing Conference, 2009. ASMC '09. IEEE/SEMI

Date of Conference:

10-12 May 2009

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