By Topic

Multidimensional and Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Kodi, A.K. ; Sch. of Electr. Eng. & Comput. Sci., Ohio Univ., Athens, OH, USA ; Louri, A.

The increasing demand for higher communication bandwidth, reduced power consumption, and increased reliability combined with fundamental electrical signalling limitations is leading the drive for optics as an interconnect technology of choice for high-performance computing (HPC) systems. However, failure in any optical link can completely disrupt communication by isolating processing nodes in HPC systems. Moreover, while static allocation of wavelengths (channels) provides every node with equal opportunity for communication, it can also lead to network congestion for nonuniform traffic patterns. In this paper, we propose a multidimensional optoelectronic architecture, called nD-reconfigurable, all-photonic interconnect for distributed and parallel systems (ndimensional-RAPID) where n can be 1, 2, or 3. nD-RAPID exploits optical architecture and technology design space that simultaneously tackles both fault-tolerance and dynamic bandwidth reallocation (DBR) of system architecture. Fault-tolerance in nD-RAPID is enabled through a multidimensional architecture. DBR is implemented by the row-column switching matrix using silicon-on-insulator (SOI)-based microring resonators that adapts to changes in communication patterns at runtime. Simulation results indicate that nD-RAPID outperformed other electrical networks for most traffic patterns. Results on DBR show that the proposed row-column switch organization significantly improves throughput and latency with a slight increase in electrical power consumption (~ 0.4% for the worst case traffic).

Published in:

Lightwave Technology, Journal of  (Volume:27 ,  Issue: 21 )