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Fabrication-induced variations in the critical currents of Josephson junctions significantly affect the performance and yield of complex superconducting integrated circuits. Electrical stress that may develop during plasma processing steps in the fabrication process was initially suggested as a possible cause of these variations. The effect on the Josephson and quasiparticle tunneling properties of Nb/Al/AlOx/Nb junctions with ultrathin AlOx barriers by the application of dc electrical stress was investigated. Current ramps with increasing amplitude corresponding to voltages across the barrier up to ~ 0.65 V were used to apply electrical stress. Junction conductance and current-voltage (I-V) characteristics were measured after each stress application at room temperature. As the stressing progresses, a dramatic increase in subgap conductance of the junctions, the appearance of subharmonic current steps, and a gradual increase in both the critical and the excess currents as well as a decrease in the normal-state resistance have been observed. A model is proposed wherein a progressively increasing number of defects and associated additional conduction channels (superconducting quantum point contacts (SQPCs)) are induced by the applied electric field in the tunnel barrier. The dependence of the stress effect on the polarity is also investigated and the results are presented. It is found that the magnitude of stress current needed for junction breakdown is unlikely to be supplied during plasma processing and as such, potential differences that can develop during plasma processing appear to be an unlikely cause of fabrication-induced, circuit pattern-dependent variations of Josephson junctions' critical currents in superconductor integrated circuits.