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Deformation of Si(100) wafers during rapid thermal annealing

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5 Author(s)
Jongste, J. F. ; Delft Institute for Microelectronics and Submicron Technology, Submicron Technology Section, (DIMES/S), Delft University of Technology, P. O. Box 5046, 2600 GA Delft, The Netherlands ; Oosterlaken, T. G. M. ; Bart, G. C. J. ; Janssen, G. C. A. M.
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In this paper in situ wafer curvature measurements are presented that were performed during rapid thermal annealing of silicon wafers. The wafer curvature due to thermal stress originating from a nonuniform temperature distribution was measured as a function of time for a fixed setting of the illumination source power. The presence of thermal stress was clearly demonstrated. It was found that wafers deform during the complete annealing cycle and moreover that, the deformation is largest during the heating and cooling transients. The influence of various wafer supports on the deformation was investigated. The use of a susceptor and a guard ring reduce the wafer deformation compared to a free‐standing wafer by a factor of 6 and 10, respectively.

Published in:

Journal of Applied Physics  (Volume:75 ,  Issue: 6 )