By Topic

Optimization of hybrid circuits for echo cancellation in high-rate digital subscriber line transmission

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Wen-Kuang Su ; Comput. & Commun. Res. Labs., Ind. Technol. Res. Inst., Hsinchu, Taiwan ; Yih-Rong Chen ; D. W. Lin

Echo cancellation is common in full-duplex data transmission over pair-wire telephone lines. A well-designed hybrid circuit can lessen the echo canceller's burden as well as reduce the A/D converter's complexity in a digital implementation. We formulate the task of hybrid design as an optimization problem where the objective function is a weighted average of post-cancellation echo power, echo canceller complexity, and A/D converter complexity. In contrast, prior work in this area appears to have not considered the effect of echo cancellation in problem formulation. We discuss proper forms for the objective function and employ one of them in a numerical study. The chosen objective function is a weighted sum-squares value of the transhybrid echo impulse response. We consider several simple balance network topologies for the hybrid. These networks range from a simple resistor to a fourth-order RLC circuit. The numerical results obtained show that there is significant advantage in using optimized higher-order balance networks, as compared to suboptimal balance networks or simple resistor balance, in terms of both echo cancellation efficiency and hardware complexity. Some topics for further study are indicated

Published in:

Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on

Date of Conference:

5-8 Dec 1994