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Code optimization method utilizing memory addressing operation and its application to DSP compiler

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4 Author(s)
S. Iimuro ; Dept. of Phys. Electron., Tokyo Inst. of Technol., Japan ; N. Sugino ; A. Nishihara ; N. Fujii

Methods to derive an efficient memory access pattern for DSPs of which memory is accessed only by address registers (ARs) are discussed. Variables in a program and AR operations are modeled by an access graph. A novel memory allocation method, which removes cycles and forks in a given access graph, and decides an efficient address location of variables in memory space, is proposed. In order to utilize multiple ARs, methods to assign variables into ARs are investigated. The method based on min-cut algorithm is superior to the method based on the simulated annealing technique. The proposed methods are applied to the compiler for DSP56000 and generated codes for several examples are very much improved

Published in:

Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on

Date of Conference:

5-8 Dec 1994