Aiming at incommodity of extent hearing aid in the market, a new design of hearing aid is brought forward in this paper. First, the system construction is discussed, the difference between which and other hearing aids is it uses FPGA for voice processing. Second, the application of FPGA and embedded soft core Nios II is described, how to utilize SOPC builder explore Nios II embedded processor and what's the benefit. DSP algorithm is also implemented in FPGA chip by Verilog HDL and because of strong ability of parallel processing the system based on FPGA runs faster than DSP chip does in signal processing. Third, the practicability of this device is explained through comparing with other hearing aids. The table shows the design has fine market respect because of its small size, cheap price and preferable operating performance.
Published in:
Industrial Electronics and Applications, 2009. ICIEA 2009. 4th IEEE Conference on
Date of Conference: 25-27 May 2009