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Principles of CIC (cascade integrator comb) filter and DFC (digital-to-frequency converter) which is used in energy calculation are illustrated detailed in this paper. A new structure of 3-order CIC decimation filter is put forward in order meet the requirements of electric power metering chip, and a simple DFC method is presented in order to generate pulses proportional to the active power. VHDL is used to implement the two modules mentioned above and this design is verified on Altera's FPGA chip CycloneII EP2C35F484C8. At last, the design is applied in an electric power metering integrated chip. The calculation result shows that the design can improve precision of metering and stability of system. It is also improved that the design can save hardware resources and reduces costs.