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A cellular neural network (CNN) emulator architecture processing real-time video signals is proposed and implemented on FPGA. The main features of this architecture are: 1) No external memory is required; 2) Computation of each pixel is carried out in three clock cycles and; 3) The number of Euler iterations required for the computation of the output values is determined by the number of implemented processor units (PUs). The architecture is based on a single pipelined cell which is employed to emulate a CNN with larger number of neurons. This cell consists of many processing units connected in cascade and working simultaneously. The image data is to be transmitted to the emulator (FPGA) in a progressive manner as in the case of VGA, DVI, progressive cameras or digital interfaced CMOS cameras. The video image pixels are processed and outputted simultaneously with the incoming pixel values. The proposed architecture is realized on a Xilinx Virtex-II FPGA in Celoxica RC203 board and used in an edge detection application. The implemented system is tested to process a 640 times 480 pixel 60 fps monochrome VGA video input using 18 bit 3 times 3 CNN templates and the output video is observed on a VGA monitor.
Date of Conference: 9-11 April 2009