By Topic

A novel technique for parallel computations using associative dataflow processor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
T. Jamil ; Comput. Eng. Program, Florida Inst. of Technol., Melbourne, FL, USA ; R. G. Deshmukh

The current microelectronics technology is expected to have the capability of 50-100 million transistors on a single chip by the year 2000. Such an on-chip hardware capacity motivates the development of a new generation of faster and more intelligent computers incorporating efficient techniques to handle computations. The prevalent concepts of control-flow and data-flow to build computers have their limitations and weaknesses in exploiting parallelism to the utmost limit. Therefore, a novel technique to handle parallel computations, called associative dataflow, is presented in this paper. In the proposed model of computation, the need for tokens is eliminated. The processing of a dataflow graph is accomplished in two phases. (1) The search phase: assuming the dataflow graph to be upside-down, each node at the top of the hierarchy, called the parent, looks for its descendants, called children, which are at the bottom of the hierarchy. This facilitates each node to know its data and destination(s) in the system. (2) The execution phase: the operations are performed, but now there is no delay in creating or matching tokens. This approach eliminates the major bottleneck in dataflow architectures, concerning the matching of tokens and the enhancement of their performance. Preliminary results have indicated a faster execution speed and higher ALU utilization for the proposed model compared to the conventional dataflow model. These results forecast a promising future for the associative dataflow model of computation

Published in:

Southeastcon '95. Visualize the Future., Proceedings., IEEE

Date of Conference:

26-29 Mar 1995