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A method combining the conventional 3D FDTD algorithm with the time domain modal expansion has been applied to the analysis of planar circuits enclosed within metallic packages. This method allows for the reduction of the 3D FDTD computational domain to a restricted region close to the planar circuit. This technique has been applied to two different structures: a microstrip and a CPW discontinuity. The results show a significant improvement of the computational efficiency without any appreciable degradation of the accuracy.