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Fast computation of MISR signatures

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3 Author(s)
Franklin, M. ; Dept. of Electr. & Comput. Eng., Clemson Univ., SC, USA ; Saluja, K.K. ; Kim, K.

Signature analyzers are widely used for compressing test responses. Off-line determination of signatures (for both good circuit and faulty circuits) is a compute-intensive process that involves cycle-by-cycle simulation of the signature analyzer. In this paper, we investigate techniques for speeding up the simulation of multi-input signature registers (MISRs). We first analyze a speedup technique that processes each input independently by table lookups, and show its shortcomings. We then propose a speedup technique that converts the MISR into an equivalent single input circuit. We also present the results of a simulation study that show that this technique achieves a good speedup

Published in:

VLSI Design, 1995., Proceedings of the 8th International Conference on

Date of Conference:

4-7 Jan 1995