By Topic

A new VLSI 2-D fourfold-rotational-symmetry filter architecture design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Pei-Yu Chen ; Dept. of Comput. Sci., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Lan-Da Van ; Reddy, H.C. ; Chin-Teng Lin

In this paper, we propose two new two-dimensional (2-D) IIR and FIR filter architectures for 2-D transfer function using fourfold rotational symmetry. The presented type-I structure with fourfold rotational symmetry has the lowest number of multipliers, and zero latency. Importantly, the proposed type-II IIR filter possesses high speed, local broadcast, and the same number of multipliers and latency as the type I shows at expense of a slight increment of number of delay elements.

Published in:

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Date of Conference:

24-27 May 2009