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Recursive Path Selection for Delay Fault Testing

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2 Author(s)
Jaeyong Chung ; Comput. Eng. Res. Center, Univ. of Texas at Austin, Austin, TX, USA ; Abraham, J.A.

This paper presents a new path selection algorithm for delay fault testing in a statistical timing framework. Existing algorithms which consider correlation between paths use an iterative process for each path or defect and require a Monte Carlo simulation for each iteration to calculate the conditional fault probability. The proposed algorithm does not require the iteration process and selects a requested number of paths simultaneously once it performs a statistical timing analysis at the beginning. If selection of k paths is required in a set of paths, it partitions the set into two path sets and determines how many paths should be selected in each path set out of the k paths. It recursively continues this process and ends up with k paths. The partitioning is easily performed during the recursive traversal of a circuit, which produces an imaginary path tree, where paths are already grouped based on their prefix. Experimental results show the proposed algorithm can effectively use structural correlation and spatial correlation to generate high quality path sets.

Published in:

VLSI Test Symposium, 2009. VTS '09. 27th IEEE

Date of Conference:

3-7 May 2009