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A novel test generation approach for parametric faults in linear analog circuits

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3 Author(s)
Zheng, H.H. ; Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA ; Balivada, A. ; Abraham, J.A.

While analog test generation tools are still in their infancy, the corresponding tools in the digital domain have reached a fair degree of maturity and acceptance. Recognizing this fact, we propose a novel test generation method for linear analog circuits that employs well established digital test software to generate time-domain tests for analog parametric faults. We transform the analog circuit to an equivalent digital circuit, and target only those stuck-at faults in the digital circuit that could possibly capture parametric failures in the original analog circuit. Hence, the sequence of digital test vectors obtained from any test generator represents a test waveform for the analog parametric faults. The technique is illustrated using examples that show this to be a simple, yet attractive alternative to costlier simulation-based analog test generation approaches

Published in:

VLSI Test Symposium, 1996., Proceedings of 14th

Date of Conference:

28 Apr-1 May 1996

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