By Topic

Low energy memory component design for cost-sensitive high performance embedded systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Gebotys, C.H. ; Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

Although memory has been shown to be a crucial component of the total system energy dissipation, few low energy memory design techniques exist. This paper presents for the first time a network flow approach to minimizing the energy dissipation of memory components during systems synthesis. The number of external and internal memory accesses and the number of extra computations (or data regeneration) for each task is optimized to minimize the total estimated system energy dissipation. This is unlike previous research which has only discussed adhoc suggestions for this problem. Results for a large complex real industrial application, audio compression, donated by Motorola, show that estimated energy savings of 2 to 10 times per task contributed 2.7 times energy savings for the embedded system. This research is important for industry since energy dissipation consideration at the early stages of design is crucial for mapping high performance applications into cost-efficient and reliable systems

Published in:

Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996

Date of Conference:

5-8 May 1996