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Avalanche multiplication in a compact bipolar transistor model for circuit simulation

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2 Author(s)
Kloosterman, W.J. ; Philips Res. Lab., Eindhoven, Netherlands ; de Graaff, H.C.

Weak avalanche in bipolar transistors can be accurately modeled by using the collector depletion capacitance. This model has the advantages of a relatively fast numerical evaluation and an easily extracted avalanche parameter. The model incorporates internal voltage drop and temperature dependence and can be implemented in any compact bipolar transistor model

Published in:

Bipolar Circuits and Technology Meeting, 1988., Proceedings of the 1988

Date of Conference:

12-13 Sep 1988