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A 1.2 GHz CMOS dual-modulus prescaler using new dynamic D-type flip-flops

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3 Author(s)
Byungsoo Chang ; Dept. of Electron. Eng., Seoul Nat. Univ., South Korea ; Joonbae Park ; Kim, Wonchan

A 1.2 GHz dual-modulus prescaler IC fabricated with 0.8 μm CMOS technology is presented in this paper. The dual-modulus prescaler includes a synchronous counter (divide-by-4/5) and an asynchronous counter (divide-by-32). A new dynamic D-flip-flop (DFF) is developed for the high-speed synchronous counter. The maximum operating frequency of 1.22 GHz with power consumption of 25.5 mW has been measured at 5 V supply voltage

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:31 ,  Issue: 5 )

Date of Publication:

May 1996

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