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MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues

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7 Author(s)
Shoun Matsunaga ; Laboratory for Brainware Systems, Research Institute of Electrical Communication (RIEC), Tohoku University, Sendai, Japan ; Jun Hayakawa ; Shoji Ikeda ; Katsuya Miura
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Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced interconnection delay. This paper presents novel nonvolatile logic circuits based on logic-in-memory architecture using magnetic tunnel junctions (MTJs) in combination with MOS transistors. Since the MTJ with a spin-injection write capability is only one device that has all the following superior features as large resistance ratio, virtually unlimited endurance, fast read/write accessibility, scalability, complementary MOS (CMOS)-process compatibility, and nonvolatility, it is very suited to implement the MOS/MTJ-hybrid logic circuit with logic-in-memory architecture. A concrete nonvolatile logic-in-memory circuit is designed and fabricated using a 0.18 mum CMOS/MTJ process, and its future prospects and issues are discussed.

Published in:

2009 Design, Automation & Test in Europe Conference & Exhibition

Date of Conference:

20-24 April 2009