Scheduled System Maintenance:
Some services will be unavailable Sunday, March 29th through Monday, March 30th. We apologize for the inconvenience.
By Topic

A high-resolution, compact, and low-power ADC suitable for multi-channel implementation: measurements and methods of self-calibration

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
1 Author(s)
Jansson, C. ; Dept. of Sensor Technol., Nat. Defence Res. Establ., Linkoping, Sweden

The first and promising measurements of a 16-bit ADC using a new topology for high-resolution and medium speed applications have been presented. The noise level was measured to 0.5 lsb and a conversion rate of 12.8 kHz verified. The core area of a single ADC channel is 40/spl times/1640 /spl mu/m/sup 2/ and the power consumption 0.5 mW. DNL and INL was measured to 1 bit and 5 bit, respectively, due to a non-optimum design. Easily implemented internal on-fly auto-calibration methods to neutralize matching inaccuracies are suggested.

Published in:

VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on

Date of Conference:

13-15 June 1996