Skip to Main Content
The first and promising measurements of a 16-bit ADC using a new topology for high-resolution and medium speed applications have been presented. The noise level was measured to 0.5 lsb and a conversion rate of 12.8 kHz verified. The core area of a single ADC channel is 40/spl times/1640 /spl mu/m/sup 2/ and the power consumption 0.5 mW. DNL and INL was measured to 1 bit and 5 bit, respectively, due to a non-optimum design. Easily implemented internal on-fly auto-calibration methods to neutralize matching inaccuracies are suggested.