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The charge-share modified precharge-level (CSM) architecture for high-speed and low-power ferroelectric memory

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6 Author(s)
Fujisawa, H. ; Device Dev. Center, Hitachi Ltd., Tokyo, Japan ; Sakata, T. ; Sekiguchi, T. ; Nagashima, O.
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We have proposed the charge-share modified precharge-level architecture with self-timing precharge technique. It is a low-power dissipation architecture for achieving high-density, high-speed, and high-operating-margin simultaneously, making it a leading candidate for use in an Mb-scale ferroelectric memory.

Published in:

VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on

Date of Conference:

13-15 June 1996