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The scalable communications core (SCC) is a flexible baseband processor that consists of a heterogeneous set of coarse-grained, programmable accelerators connected via a packet-based 3-ary 2-cube Network-on-Chip (NoC). SCC supports multiple wireless protocols to meet the demand for ubiquitous communications and computing with low power and area. We have recently completed a prototype test chip in a 65 nm process and validated it for WiFi and WiMAX protocols. The area and energy efficiency of our test chip is comparable to other basebands found in the literature. To demonstrate its flexibility, additional protocols have been mapped to the architecture.