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On-Chip Optical Interconnect

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22 Author(s)
Ohashi, K. ; Nano Electron. Res. Labs., MIRAI-Selete, Tsukuba ; Nishi, K. ; Shimizu, T. ; Nakada, M.
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We describe a cost-effective and low-power-consumption approach for on-chip optical interconnection. This approach includes an investigation into architectures, devices, and materials. We have proposed and fabricated a bonded structure of an Si-based optical layer on a large-scale integration (LSI) chip. The fabricated optical layer contains Si nanophotodiodes for optical detectors, which are coupled with SiON waveguides using surface-plasmon antennas. Optical signals were introduced to the optical layer and distributed to the Si nanophotodiodes. The output signals from the photodiodes were sent electrically to the transimpedance-amplifier circuitries in the LSI. The signals from the photodiodes triggered of the circuitries at 5 GHz. Since electrooptical modulators consume the most power in on-chip optical interconnect systems and require a large footprint, they are critical to establish on-chip optical interconnection. Two approaches are investigated: 1) an architecture using a fewer number of modulators and 2) high electrooptical coefficient materials.

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Proceedings of the IEEE  (Volume:97 ,  Issue: 7 )