Referenced Items are not available for this document.
We introduce an implementation of a radix 4 dual recoding procedure for the squaring operation of an n-bit number which reduces the number of bit product terms employed in the previously known squaring methods obtained by either Booth radix-4 recoded multiplication or by radix 2 squaring. Several other squaring algorithms have been developed such as [WSM99], [YW01], and [SNC01]. Employing the dual recoded radix-4 procedure for design of a squaring circuit introduces a significant reduction in power and area. Architecturally, radix-4 dual recoded squaring uses only the 1's complement representation which allows for a simpler PPG structure as compared to the 2's complement representation required for Booth radix-4 multiplication.
Published in:
Signals, Systems and Computers, 2008 42nd Asilomar Conference on
Date of Conference: 26-29 Oct. 2008
- Page(s):
- 1819 - 1822
- ISSN :
- 1058-6393
- E-ISBN :
- 978-1-4244-2941-7
- Print ISBN:
- 978-1-4244-2940-0
- INSPEC Accession Number:
- 10718848
- Conference Location :
- Pacific Grove, CA
- Digital Object Identifier :
- 10.1109/ACSSC.2008.5074741
- Product Type:
- Conference Publications
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
