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A Min–Max Optimization Framework for Designing \Sigma \Delta Learners: Theory and Hardware

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2 Author(s)
Gore, A. ; Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA ; Chakrabartty, S.

In this paper, we present a framework for constructing ΣΔ learning algorithms and hardware that can identify and track low-dimensional manifolds embedded in a high-dimensional analog signal space. At the core of the proposed approach is a min-max stochastic optimization of a regularized cost function that combines machine learning with ΣΔ modulation. As a result, the algorithm not only produces a quantized sequence of the transformed analog signals but also a quantized representation of the transform itself. The framework is generic and can be extended to higher order ΣΔ modulators and for different signal transformations. In this paper, the ΣΔ learning is demonstrated for identifying linear compression manifolds, which can eliminate redundant AD conversion (ADC) paths. This improves the energy efficiency of the proposed architecture compared to a conventional multichannel data acquisition system. Measured results from a four channel prototype fabricated in a 0.5 μm CMOS process has been used to verify the energy efficiency of the ΣΔ learner and to demonstrate its real-time adaptation capabilities that are consistent with the theoretical and simulated results. One of the salient features of ΣΔ learning is its self-calibration property, whereby the performance remains unchanged even in the presence of computational artifacts (mismatch and nonlinearities). This property makes the proposed architecture ideal for implementing practical high-dimensional AD converters.

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:57 ,  Issue: 3 )