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A Novel Three-Dimensional Packaging Method for Al-Metalized SiC Power Devices

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5 Author(s)
Fengqun Lang ; Energy Semicond. Electron. Res. Lab., Nat. Inst. of Adv. Ind. Sci. & Technol., Tsukuba, Japan ; Hayashi, Y. ; Nakagawa, H. ; Aoyagi, M.
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A novel three-dimensional packaging method for Al-metalized SiC power devices has been developed by means of Au stud bumping technology and a subsequent vacuum reflow soldering process with Au-20Sn solder paste. Al-metalized electrodes of a SiC power chip can be robustly assembled to a direct bonded copper (DBC) substrate with this method. The bump shear strength of a Au stud bump on an Al electrode of a SiC chip increased with bonding temperature. The die shear strength of a SiC chip on the DBC substrate increased with the number of Au stud bumps which were preformed on the Al electrode. The bonded SiC-SBD chips on a DBC substrate were aged at 250degC in a vacuum furnace and the morphologies, die shear strength and electrical properties were investigated after a certain aging time. After 1000 h aging at 250degC, the electrical resistance of the bonded SiC-SBD chips only increased about 0.4%, the residual die shear strength was much higher than that of the IEC749 (or JEITA) standard value, and little morphological change was observed by a micro-focus X-ray TV system. Very little diffusion between Au stud bumps and Au-20Sn solder was observed by scanning electron microscope (SEM) equipped with an energy dispersed X-ray analyzer (EDX). Intermetallic compounds (IMC) evolved at the interface of chip/solder and chip/Au stud bumps after 1000 h aging at 250degC. With this method, power devices with Al bond pads can be three-dimensionally packaged.

Published in:

Advanced Packaging, IEEE Transactions on  (Volume:32 ,  Issue: 4 )

Date of Publication:

Nov. 2009

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