By Topic

Multiple fault detection in fan-out free circuits using minimal single fault test set

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
K. Lai ; Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA ; P. K. Lala

This paper presents a new algorithm to generate test sets for single stuck-at faults, which also detect all multiple stuck-at faults in fan-out-free circuits. This algorithm derives the test set for each node in a fan-out-free circuit by calculating the output count of the node. The output count indicates the number of test patterns needed to check for all faults in the corresponding subcircuit. The fan-out-free circuit can be any combination of AND, OR, NOT, NAND, and NOR gates

Published in:

IEEE Transactions on Computers  (Volume:45 ,  Issue: 6 )