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Design of wideband all-digital phase locked loops using multirate digital filter banks

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3 Author(s)
Sadr, R. ; Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA ; Shah, B. ; Hinedi, S.

All-digital phase locked loops (DPLLs) have many advantages over analog loops. However, due to digital device limitations and costs, superwide PLLs with front-end bandwidths as high as one gigahertz are commonly implemented using analog parts. This article presents a new architecture that allows an all-digital implementation of superwide PLLs. The problem of operating digital components at high speed is avoided here (without reducing the front-end bandwidths) by inserting a multirate digital filter bank in front of the DPLL. The new design is shown to have steady-state and transient performance that is identical to a conventional DPLL

Published in:

Communications, IEEE Transactions on  (Volume:44 ,  Issue: 6 )

Date of Publication:

Jun 1996

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