The Influence of TiN Thickness and Formation Method on the Structural and Electrical Properties of Gate Stacks

In this brief, we report on how controllable process parameters such as metal-gate physical thickness and interfacial-layer-formation method affect the electrical and structural properties of TiN/HfO₂/SiO₂ gate stacks. We found evidence that Hf is diffusing into chemically formed SiO₂ interfacial layers during device processing. The latter is not seen when SiO₂ is formed thermally. We show that the interfacial layer is thinner when the physical thickness of TiN is reduced from 7 to 3 nm, resulting in electrically thinner gate stacks by 2 Aring. An electrical thickness in inversion as low as 11.4 Aring with gate-leakage-current density equal to 3.5 A/cm² at 1 V was obtained for spike-annealed thin TiN/HfO₂ stacks on chemically grown interfaces. Hf-rich chemical interfacial oxides do not degrade device performance. A small reduction in transconductance is only seen for physically thinner interfacial layers.