In silicon nanocrystal based metal–oxide–semiconductor memory structures, tuning of the electron tunneling distance between the Si substrate and Si nanocrystals located in the gate oxide is a crucial requirement for the pinpointing of optimal device architectures. In this work it is demonstrated that this tuning of the “injection distance” can be achieved by varying the Si+ ion energy or the oxide thickness during the fabrication of Si nanocrystals by ultralow-energy silicon implantation. Using an accurate cross-section transmission electron microscopy (XTEM) method, it is demonstrated that two-dimensional arrays of Si nanocrystals cannot be positioned closer than 5 nm to the channel by increasing the implantation energy. It is shown that injection distances down to much smaller values (2 nm) can be achieved only by decreasing the nominal thickness of the gate oxide. Depth profiles of excess silicon measured by time-of-flight secondary ion mass spectroscopy and Si nanocrystal locations determined by XTEM are compared with Monte-Carlo simulations of the implanted Si profiles taking into account dynamic target changes due to ion implantation, ion erosion, and ion beam mixing. This combination of experimental and theoretical studies gives a safe explanation regarding the unique technological route of obtaining Si nanocrystals at distances smaller than 5 nm from the channel: the formation of nanocrystals requires that the interface mixing due to collisional damage does not overlap with the range profile to the extent that there is no more a local maximum of Si excess buried in the SiO2 layer. © 2004 American Institute of Physics.