Skip to Main Content
Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1063/1.1512314
Recent work on modeling dislocation behavior in small semiconductor structures is extended to the level of complexity appropriate to actual manufacturing situations. The dislocation-dynamics code PARANOID is generalized to handle arbitrary geometries and unstructured stress tables, and combined with commercial process-modeling software to study the dislocation configurations which arise during the growth of the well-known local oxidation of silicon “bird’s beak” structure. Experimentally observed dislocation patterns are reproduced with considerable fidelity. The observed Hu loop configuration is matched to 90% accuracy, provided that the long-range thermal mismatch stresses arising from cooldown are included. It is concluded that the main remaining obstacle to predicting dislocation behavior during device manufacture lies in the difficulty of utilizing current three-dimensional process-modeling codes to obtain reliable stress fields. © 2002 American Institute of Physics.