By Topic

A fast-settling 3 V CMOS buffer amplifier

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Gradinariu, I. ; Lab. de Phys. de la Matiere, INSA de Lyon, Villeurbanne, France ; Gontrand, C.

This paper presents a two-stage fast, power-efficient 3 V CMOS buffer amplifier with rail-to-rail input/output voltage ranges. Because of its constant gm, class-AB input stage, the amplifier is free of slew-rate limitation and its settling-time is quasi-independent on input step amplitude. The amplifier has 6 MHz unity-gain frequency, 1 mW power-consumption and settles to 1% accuracy within 180 ns on 100 pF load. As the class-AB input stage operates at constant quiescent current over the input voltage range, CMRR exceeds 70 dB

Published in:

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on  (Volume:43 ,  Issue: 6 )