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Compact CMOS circuit for outlier removal

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1 Author(s)
Wilson, D.M. ; Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA

A CMOS chip that averages an array of analogue inputs and removes outlying inputs from the calculation of the output is presented. Implemented in analogue VLSI, these circuits perform the outlier-based averaging massively in parallel, while using only 13 transistors per analogue input in the array. This technique allows the preprocessing of massive arrays of analogue inputs, commonly found in sensing applications, on the input plane itself, thereby reducing the communication bottleneck at the chip I/O interface

Published in:

Electronics Letters  (Volume:32 ,  Issue: 11 )