Referenced Items are not available for this document.
Register Alias Table (RAT) is a smart memory that is embedded in HPSm (High-Performance Substrate), a Berkeley data-flow CPU. It is a multiport memory that has content addressability and support for branch prediction and exception handling, in addition to conventional read and write operations. An experimental 1240-b smart memory chip is implemented in a 1.6-μm double-metal scalable CMOS process. This memory performs 15 operations within a cycle time of 100 ns, has 34658 transistors, occupies an area of 3.8 mm×5.2 mm, and dissipates 0.51 W
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:25
,
Issue:
1
)
Date of Publication: Feb 1990
- Page(s):
- 84 - 94
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 3663012
- Digital Object Identifier :
- 10.1109/4.50289
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Feb 1990
- Sponsored by :
- IEEE Solid-State Circuits Society
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