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Synthesis of initializable asynchronous circuits

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4 Author(s)
S. T. Chakradhar ; C&C Res. Labs., NEC Res. Inst., Princeton, NJ, USA ; S. Banerjee ; R. K. Roy ; D. K. Pradhan

We show that existing synthesis techniques may produce asynchronous circuits that are not initializable by gate level analysis tools even when the design is functionally initializable. Due to the absence of any initialization sequence, a fault simulator or test generator that assumes an unknown starting state will be completely ineffective for these circuits. In this paper, we show that proper consideration of initializability during the asynchronous circuit synthesis procedure can guarantee initializable implementations. We show that the assignment of don't cares during the synthesis procedure affects the initializability of the final implementation. We present a novel implicit enumeration procedure that selectively assigns don't cares to obtain an initializable implementation. Initialization sequences are obtained as a by-product of our synthesis procedure.

Published in:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems  (Volume:4 ,  Issue: 2 )