Two‐step annealed polycrystalline silicon thin‐film transistors

The performance of polysilicon thin‐film transistors fabricated by two‐step annealing, which consists of furnace annealing and the subsequent excimer laser annealing, is described. It was found that the average grain size of low‐temperature furnace‐annealed polysilicon films was several times larger than that of excimer‐laser‐annealed polysilicon films while the density of in‐grain defect of low‐temperature furnace‐annealed films was much higher than that of excimer‐laser‐annealed film. However, the device characteristics of the low‐temperature furnace‐annealed polysilicon thin‐film transistors were improved significantly by postannealing, such as high‐temperature furnace annealing and excimer laser annealing, due to the effective elimination of in‐grain defects. We found that the significantly improved temperature characteristics of drain current and hydrogen passivation rate of two‐step annealed polysilicon thin‐film transistors were also caused by the significantly reduced in‐grain defects by postannealing. The density of trap states, which was extracted from the transfer curves of polysilicon thin‐film transistors, was used to demonstrate the effects of modifying the deep and tail trap levels by two‐step annealing. © 1996 American Institute of Physics.