Close category search window
 

CMOS VLSI realization of voltage-mode programmable analog cellular neural network

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Reljin, B. ; Fac. of Electr. Eng., Belgrade Univ., Serbia ; Serdar, T. ; Kostic, P. ; Pavasovic, A.

A highly efficient Cellular Neural Network (CNN) basic cell circuit containing only one finite gain amplifier is presented. Along with minimization of the layout space used, this cell circuit offers a unique possibility to control (decrease) a network time-constant by changing (increasing) the amplifiers gain only. A full-custom CMOS VLSI realization of this circuit is systematically explained. Based on this cell, a general-purpose CMOS VLSI CNN chip is then realized in 2 μm scaleable CMOS technology on the MOSIS Tiny Frame chip. The presented architecture was compared with the known CNN's for some image-processing applications

Published in:
Microelectronics, 1995. Proceedings., 1995 20th International Conference on  (Volume:2 )

Date of Conference: 12-14 Sep 1995

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.