By Topic

The Organization of High-Speed Memory for Parallel Block Transfer of Data

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Stone, Harold S. ; Stanford Research Institute, Stanford University, Menlo Park, Calif. 94025.

This paper describes the organization of a multi-module memory, designed to facilitate parallel block transfers. All modules are assumed to be identical, and the individual modules can fetch or store no more than one word or word group during any single memory cycle. Parallel block transfers are made possible in multimodule memories by utilizing a device called the memory circulator and by organizing the memory in a particular way. The memory circulator consists of a bank of interconnected registers, one for each memory, and control circuitry. The memory system is organized so that ascending logical addresses are distributed cyclically among the modules. If there are 2b modules, then any individual word is accessed by using the least significant b bits of a memory address to select a module and by using the remaining bits to select an address within a module. The memory circulator can load and store a contiguous block of 2b words by selecting all modules and broadcasting a single address to all modules. A contiguous block can be displaced in memory by a multiple of 2b words by broadcasting different load and store addresses for a block of data. The circulator control circuitry includes a masking capability so that blocks smaller than 2b can be moved in this fashion. When the displacement of a block transfer is not a multiple of 2b a physical circulation of the data in the memory circulator registers is required.

Published in:

Computers, IEEE Transactions on  (Volume:C-19 ,  Issue: 1 )