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Hot-carrier measurements and modelings for deep submicron CMOS technology

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1 Author(s)
Lee, M. ; Fac. of Eng., Dongshin Univ., Chonnam, South Korea

This paper presents the characterized raw data and the Hot-Carrier (HC) results for devices and circuits at various stress voltages, with stress times increasing automatically and explains them in terms of various new models for (ultra)-short channel MOSFET HC reliability fabricated from submicron CMOS process technology. A test structure for the HC automatic characterization and modeling is also an important portion as the Technology-CAD (TCAD). Based on a static approach for the HC-induced lifetime predictions and extrapolations, it is found that (1) forward HC characteristics degrade the linear region and reverse ones degrade the saturation region. Overall, the forward linear drain current shows the severest degradation; (2) the lifetimes for each MOSFET parameter by accurate models are convincing when adequate sample sizes are collected; (3) design operation voltage (VDD) at 3.3 V or 5 V would guarantee a 10-year DC and AC lifetime in the reliability protected deep submicron process technology

Published in:

Microelectronics, 1995. Proceedings., 1995 20th International Conference on  (Volume:1 )

Date of Conference:

12-14 Sep 1995