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This article introduces the design and implementation of an affordable high-performance set of identical data acquisition channels with digital processing capabilities. Each channel incorporates a versatile 16-bit sigma-delta analog-to-digital converter (ADC) with reconfigurable filter characteristics. The main component of each channel, a low-cost field-programmable gate array (FPGA), controls the ADC, serves as a random access memory to store the ADCs user-defined filters, and performs digital processing. A special case is illustrated, with the FPGA software configured to perform lock-in detection, which is widely applied in a number of tomography modalities. The detection scheme, based on a quadrature demodulator, utilizes only a fraction of the FPGA resources and introduces errors orders of magnitude less than the quantization error of the ADC. Implementations other than a lock-in amplifier can be realized without additional hardware intervention.