Very-high fT (up to 50 GHz) and fmax (up to 70 GHz) silicon bipolar transistors have been developed using Ultra-high-performance Super Self-aligned process Technology (USST). This technology is characterized by drastically-scaled lateral dimensions and shallow, heavily-doped extrinsic base structures. USST greatly reduces base-collector junction capacitance and base resistance, and hence makes fmax about twice as large as SST1C technology without vertical scaling. The fabricated ECL circuits show a minimum gate delay of 16.5 ps at a switching current of ICS=1.0 mA/G
Published in:
Electron Devices Meeting, 1995. IEDM '95., International
Date of Conference: 10-13 Dec 1995