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DT Modeling of Clock Phase-Noise Effects in LP CT  \Delta \Sigma ADCs With RZ Feedback

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2 Author(s)
Martin Anderson ; Dept. of Electr. & Inf. Technol., Lund Univ., Lund, Sweden ; Lars Sundstrom

The performance of continuous-time (CT) DeltaSigma modulators is limited by their sensitivity to clock phase noise (PN). The clock PN-induced in-band noise (IBN) is dependent on the magnitude and frequency of both the desired in-band signals and the out-of-band signals, as well as the shape of the clock PN spectrum. This brief presents a discrete-time (DT) model of the dominant clock PN-induced errors. It enables fast and accurate simulations of the clock PN effects with arbitrary input signals, PN spectra, and noise-transfer functions. The model has been verified by CT simulations and measurements on a second-order low-pass CT DeltaSigma modulator with return-to-zero feedback. The flexibility and usefulness of the DT model are demonstrated, and the two dominant clock PN effects are compared by means of simulations with orthogonal frequency-division multiplexing input signals and various PN specifications.

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IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:56 ,  Issue: 7 )